{
  "design": {
    "design_info": {
      "boundary_crc": "0x66735E2F0F78737F",
      "device": "xc7z020clg400-1",
      "gen_directory": "../../../../sdr_receiver_wide_122_88.gen/sources_1/bd/system",
      "name": "system",
      "rev_ctrl_bd_flag": "RevCtrlBdOff",
      "synth_flow_mode": "None",
      "tool_version": "2021.2",
      "validated": "true"
    },
    "design_tree": {
      "pll_0": "",
      "ps_0": "",
      "const_0": "",
      "rst_0": "",
      "adc_0": "",
      "dac_0": "",
      "hub_0": "",
      "slice_0": "",
      "slice_1": "",
      "slice_2": "",
      "slice_3": "",
      "slice_4": "",
      "dds_0": "",
      "slice_5": "",
      "dds_1": "",
      "slice_6": "",
      "dds_2": "",
      "slice_7": "",
      "dds_3": "",
      "adc_slice_0": "",
      "dds_slice_0": "",
      "mult_0": "",
      "rate_0": "",
      "cic_0": "",
      "adc_slice_1": "",
      "dds_slice_1": "",
      "mult_1": "",
      "rate_1": "",
      "cic_1": "",
      "adc_slice_2": "",
      "dds_slice_2": "",
      "mult_2": "",
      "rate_2": "",
      "cic_2": "",
      "adc_slice_3": "",
      "dds_slice_3": "",
      "mult_3": "",
      "rate_3": "",
      "cic_3": "",
      "comb_0": "",
      "fir_0": "",
      "subset_0": "",
      "const_1": "",
      "writer_0": "",
      "slice_8": "",
      "mult_4": "",
      "slice_9": "",
      "mult_5": "",
      "concat_0": ""
    },
    "interface_ports": {
      "Vp_Vn": {
        "mode": "Slave",
        "vlnv_bus_definition": "xilinx.com:interface:diff_analog_io:1.0",
        "vlnv": "xilinx.com:interface:diff_analog_io_rtl:1.0"
      },
      "Vaux0": {
        "mode": "Slave",
        "vlnv_bus_definition": "xilinx.com:interface:diff_analog_io:1.0",
        "vlnv": "xilinx.com:interface:diff_analog_io_rtl:1.0"
      },
      "Vaux1": {
        "mode": "Slave",
        "vlnv_bus_definition": "xilinx.com:interface:diff_analog_io:1.0",
        "vlnv": "xilinx.com:interface:diff_analog_io_rtl:1.0"
      },
      "Vaux9": {
        "mode": "Slave",
        "vlnv_bus_definition": "xilinx.com:interface:diff_analog_io:1.0",
        "vlnv": "xilinx.com:interface:diff_analog_io_rtl:1.0"
      },
      "Vaux8": {
        "mode": "Slave",
        "vlnv_bus_definition": "xilinx.com:interface:diff_analog_io:1.0",
        "vlnv": "xilinx.com:interface:diff_analog_io_rtl:1.0"
      },
      "DDR": {
        "mode": "Master",
        "vlnv_bus_definition": "xilinx.com:interface:ddrx:1.0",
        "vlnv": "xilinx.com:interface:ddrx_rtl:1.0",
        "parameters": {
          "AXI_ARBITRATION_SCHEME": {
            "value": "TDM",
            "value_src": "default"
          },
          "BURST_LENGTH": {
            "value": "8",
            "value_src": "default"
          },
          "CAN_DEBUG": {
            "value": "false",
            "value_src": "default"
          },
          "CAS_LATENCY": {
            "value": "11",
            "value_src": "default"
          },
          "CAS_WRITE_LATENCY": {
            "value": "11",
            "value_src": "default"
          },
          "CS_ENABLED": {
            "value": "true",
            "value_src": "default"
          },
          "DATA_MASK_ENABLED": {
            "value": "true",
            "value_src": "default"
          },
          "DATA_WIDTH": {
            "value": "8",
            "value_src": "default"
          },
          "MEMORY_TYPE": {
            "value": "COMPONENTS",
            "value_src": "default"
          },
          "MEM_ADDR_MAP": {
            "value": "ROW_COLUMN_BANK",
            "value_src": "default"
          },
          "SLOT": {
            "value": "Single",
            "value_src": "default"
          },
          "TIMEPERIOD_PS": {
            "value": "1250",
            "value_src": "default"
          }
        }
      },
      "FIXED_IO": {
        "mode": "Master",
        "vlnv_bus_definition": "xilinx.com:display_processing_system7:fixedio:1.0",
        "vlnv": "xilinx.com:display_processing_system7:fixedio_rtl:1.0",
        "parameters": {
          "CAN_DEBUG": {
            "value": "false",
            "value_src": "default"
          }
        }
      }
    },
    "ports": {
      "adc_dat_a_i": {
        "direction": "I",
        "left": "15",
        "right": "0"
      },
      "adc_dat_b_i": {
        "direction": "I",
        "left": "15",
        "right": "0"
      },
      "adc_clk_p_i": {
        "direction": "I"
      },
      "adc_clk_n_i": {
        "direction": "I"
      },
      "adc_enc_p_o": {
        "direction": "O"
      },
      "adc_enc_n_o": {
        "direction": "O"
      },
      "adc_csn_o": {
        "direction": "O"
      },
      "dac_dat_o": {
        "direction": "O",
        "left": "13",
        "right": "0"
      },
      "dac_clk_o": {
        "direction": "O",
        "parameters": {
          "CLK_DOMAIN": {
            "value": "system_dac_0_0_dac_clk",
            "value_src": "default_prop"
          },
          "FREQ_HZ": {
            "value": "100000000",
            "value_src": "default_prop"
          },
          "PHASE": {
            "value": "0.0",
            "value_src": "default_prop"
          }
        }
      },
      "dac_rst_o": {
        "direction": "O",
        "parameters": {
          "POLARITY": {
            "value": "ACTIVE_LOW",
            "value_src": "default_prop"
          }
        }
      },
      "dac_sel_o": {
        "direction": "O"
      },
      "dac_wrt_o": {
        "direction": "O"
      },
      "dac_pwm_o": {
        "direction": "O",
        "left": "3",
        "right": "0"
      },
      "exp_p_tri_io": {
        "direction": "IO",
        "left": "7",
        "right": "0"
      },
      "exp_n_tri_io": {
        "direction": "IO",
        "left": "7",
        "right": "0"
      },
      "led_o": {
        "direction": "O",
        "left": "7",
        "right": "0"
      }
    },
    "components": {
      "pll_0": {
        "vlnv": "xilinx.com:ip:clk_wiz:6.0",
        "xci_name": "system_pll_0_0",
        "xci_path": "ip/system_pll_0_0/system_pll_0_0.xci",
        "inst_hier_path": "pll_0",
        "parameters": {
          "CLKOUT1_REQUESTED_OUT_FREQ": {
            "value": "122.88"
          },
          "CLKOUT1_USED": {
            "value": "true"
          },
          "CLKOUT2_REQUESTED_OUT_FREQ": {
            "value": "245.76"
          },
          "CLKOUT2_REQUESTED_PHASE": {
            "value": "157.5"
          },
          "CLKOUT2_USED": {
            "value": "true"
          },
          "CLKOUT3_REQUESTED_OUT_FREQ": {
            "value": "245.76"
          },
          "CLKOUT3_REQUESTED_PHASE": {
            "value": "202.5"
          },
          "CLKOUT3_USED": {
            "value": "true"
          },
          "PRIMITIVE": {
            "value": "PLL"
          },
          "PRIM_IN_FREQ": {
            "value": "122.88"
          },
          "PRIM_SOURCE": {
            "value": "Differential_clock_capable_pin"
          },
          "USE_RESET": {
            "value": "false"
          }
        }
      },
      "ps_0": {
        "vlnv": "xilinx.com:ip:processing_system7:5.5",
        "xci_name": "system_ps_0_0",
        "xci_path": "ip/system_ps_0_0/system_ps_0_0.xci",
        "inst_hier_path": "ps_0",
        "parameters": {
          "PCW_ACT_APU_PERIPHERAL_FREQMHZ": {
            "value": "666.666687"
          },
          "PCW_ACT_CAN_PERIPHERAL_FREQMHZ": {
            "value": "10.000000"
          },
          "PCW_ACT_DCI_PERIPHERAL_FREQMHZ": {
            "value": "10.158730"
          },
          "PCW_ACT_ENET0_PERIPHERAL_FREQMHZ": {
            "value": "125.000000"
          },
          "PCW_ACT_ENET1_PERIPHERAL_FREQMHZ": {
            "value": "10.000000"
          },
          "PCW_ACT_FPGA0_PERIPHERAL_FREQMHZ": {
            "value": "50.000000"
          },
          "PCW_ACT_FPGA1_PERIPHERAL_FREQMHZ": {
            "value": "10.000000"
          },
          "PCW_ACT_FPGA2_PERIPHERAL_FREQMHZ": {
            "value": "10.000000"
          },
          "PCW_ACT_FPGA3_PERIPHERAL_FREQMHZ": {
            "value": "10.000000"
          },
          "PCW_ACT_PCAP_PERIPHERAL_FREQMHZ": {
            "value": "200.000000"
          },
          "PCW_ACT_QSPI_PERIPHERAL_FREQMHZ": {
            "value": "10.000000"
          },
          "PCW_ACT_SDIO_PERIPHERAL_FREQMHZ": {
            "value": "100.000000"
          },
          "PCW_ACT_SMC_PERIPHERAL_FREQMHZ": {
            "value": "10.000000"
          },
          "PCW_ACT_SPI_PERIPHERAL_FREQMHZ": {
            "value": "166.666672"
          },
          "PCW_ACT_TPIU_PERIPHERAL_FREQMHZ": {
            "value": "200.000000"
          },
          "PCW_ACT_TTC0_CLK0_PERIPHERAL_FREQMHZ": {
            "value": "111.111115"
          },
          "PCW_ACT_TTC0_CLK1_PERIPHERAL_FREQMHZ": {
            "value": "111.111115"
          },
          "PCW_ACT_TTC0_CLK2_PERIPHERAL_FREQMHZ": {
            "value": "111.111115"
          },
          "PCW_ACT_TTC1_CLK0_PERIPHERAL_FREQMHZ": {
            "value": "111.111115"
          },
          "PCW_ACT_TTC1_CLK1_PERIPHERAL_FREQMHZ": {
            "value": "111.111115"
          },
          "PCW_ACT_TTC1_CLK2_PERIPHERAL_FREQMHZ": {
            "value": "111.111115"
          },
          "PCW_ACT_TTC_PERIPHERAL_FREQMHZ": {
            "value": "50"
          },
          "PCW_ACT_UART_PERIPHERAL_FREQMHZ": {
            "value": "100.000000"
          },
          "PCW_ACT_USB0_PERIPHERAL_FREQMHZ": {
            "value": "60"
          },
          "PCW_ACT_USB1_PERIPHERAL_FREQMHZ": {
            "value": "60"
          },
          "PCW_ACT_WDT_PERIPHERAL_FREQMHZ": {
            "value": "111.111115"
          },
          "PCW_APU_CLK_RATIO_ENABLE": {
            "value": "6:2:1"
          },
          "PCW_APU_PERIPHERAL_FREQMHZ": {
            "value": "666.666666"
          },
          "PCW_CAN0_PERIPHERAL_CLKSRC": {
            "value": "External"
          },
          "PCW_CAN0_PERIPHERAL_ENABLE": {
            "value": "0"
          },
          "PCW_CAN1_PERIPHERAL_CLKSRC": {
            "value": "External"
          },
          "PCW_CAN1_PERIPHERAL_ENABLE": {
            "value": "0"
          },
          "PCW_CAN_PERIPHERAL_CLKSRC": {
            "value": "IO PLL"
          },
          "PCW_CAN_PERIPHERAL_VALID": {
            "value": "0"
          },
          "PCW_CLK0_FREQ": {
            "value": "50000000"
          },
          "PCW_CLK1_FREQ": {
            "value": "10000000"
          },
          "PCW_CLK2_FREQ": {
            "value": "10000000"
          },
          "PCW_CLK3_FREQ": {
            "value": "10000000"
          },
          "PCW_CPU_CPU_6X4X_MAX_RANGE": {
            "value": "667"
          },
          "PCW_CPU_PERIPHERAL_CLKSRC": {
            "value": "ARM PLL"
          },
          "PCW_CRYSTAL_PERIPHERAL_FREQMHZ": {
            "value": "33.333333"
          },
          "PCW_DCI_PERIPHERAL_CLKSRC": {
            "value": "DDR PLL"
          },
          "PCW_DCI_PERIPHERAL_FREQMHZ": {
            "value": "10.159"
          },
          "PCW_DDR_PERIPHERAL_CLKSRC": {
            "value": "DDR PLL"
          },
          "PCW_DDR_RAM_HIGHADDR": {
            "value": "0x1FFFFFFF"
          },
          "PCW_ENET0_ENET0_IO": {
            "value": "MIO 16 .. 27"
          },
          "PCW_ENET0_GRP_MDIO_ENABLE": {
            "value": "1"
          },
          "PCW_ENET0_GRP_MDIO_IO": {
            "value": "MIO 52 .. 53"
          },
          "PCW_ENET0_PERIPHERAL_CLKSRC": {
            "value": "IO PLL"
          },
          "PCW_ENET0_PERIPHERAL_ENABLE": {
            "value": "1"
          },
          "PCW_ENET0_PERIPHERAL_FREQMHZ": {
            "value": "1000 Mbps"
          },
          "PCW_ENET0_RESET_ENABLE": {
            "value": "0"
          },
          "PCW_ENET1_PERIPHERAL_CLKSRC": {
            "value": "IO PLL"
          },
          "PCW_ENET1_PERIPHERAL_ENABLE": {
            "value": "0"
          },
          "PCW_ENET_RESET_ENABLE": {
            "value": "1"
          },
          "PCW_ENET_RESET_POLARITY": {
            "value": "Active Low"
          },
          "PCW_ENET_RESET_SELECT": {
            "value": "Share reset pin"
          },
          "PCW_EN_4K_TIMER": {
            "value": "0"
          },
          "PCW_EN_CAN0": {
            "value": "0"
          },
          "PCW_EN_CAN1": {
            "value": "0"
          },
          "PCW_EN_CLK0_PORT": {
            "value": "1"
          },
          "PCW_EN_CLK1_PORT": {
            "value": "0"
          },
          "PCW_EN_CLK2_PORT": {
            "value": "0"
          },
          "PCW_EN_CLK3_PORT": {
            "value": "0"
          },
          "PCW_EN_DDR": {
            "value": "1"
          },
          "PCW_EN_EMIO_CAN0": {
            "value": "0"
          },
          "PCW_EN_EMIO_CAN1": {
            "value": "0"
          },
          "PCW_EN_EMIO_CD_SDIO0": {
            "value": "0"
          },
          "PCW_EN_EMIO_CD_SDIO1": {
            "value": "0"
          },
          "PCW_EN_EMIO_ENET0": {
            "value": "0"
          },
          "PCW_EN_EMIO_ENET1": {
            "value": "0"
          },
          "PCW_EN_EMIO_GPIO": {
            "value": "1"
          },
          "PCW_EN_EMIO_I2C0": {
            "value": "0"
          },
          "PCW_EN_EMIO_I2C1": {
            "value": "0"
          },
          "PCW_EN_EMIO_MODEM_UART0": {
            "value": "0"
          },
          "PCW_EN_EMIO_MODEM_UART1": {
            "value": "0"
          },
          "PCW_EN_EMIO_PJTAG": {
            "value": "0"
          },
          "PCW_EN_EMIO_SDIO0": {
            "value": "0"
          },
          "PCW_EN_EMIO_SDIO1": {
            "value": "0"
          },
          "PCW_EN_EMIO_SPI0": {
            "value": "1"
          },
          "PCW_EN_EMIO_SPI1": {
            "value": "0"
          },
          "PCW_EN_EMIO_SRAM_INT": {
            "value": "0"
          },
          "PCW_EN_EMIO_TRACE": {
            "value": "0"
          },
          "PCW_EN_EMIO_TTC0": {
            "value": "0"
          },
          "PCW_EN_EMIO_TTC1": {
            "value": "0"
          },
          "PCW_EN_EMIO_UART0": {
            "value": "0"
          },
          "PCW_EN_EMIO_UART1": {
            "value": "0"
          },
          "PCW_EN_EMIO_WDT": {
            "value": "0"
          },
          "PCW_EN_EMIO_WP_SDIO0": {
            "value": "0"
          },
          "PCW_EN_EMIO_WP_SDIO1": {
            "value": "0"
          },
          "PCW_EN_ENET0": {
            "value": "1"
          },
          "PCW_EN_ENET1": {
            "value": "0"
          },
          "PCW_EN_GPIO": {
            "value": "1"
          },
          "PCW_EN_I2C0": {
            "value": "1"
          },
          "PCW_EN_I2C1": {
            "value": "0"
          },
          "PCW_EN_MODEM_UART0": {
            "value": "0"
          },
          "PCW_EN_MODEM_UART1": {
            "value": "0"
          },
          "PCW_EN_PJTAG": {
            "value": "0"
          },
          "PCW_EN_QSPI": {
            "value": "0"
          },
          "PCW_EN_SDIO0": {
            "value": "1"
          },
          "PCW_EN_SDIO1": {
            "value": "0"
          },
          "PCW_EN_SMC": {
            "value": "0"
          },
          "PCW_EN_SPI0": {
            "value": "1"
          },
          "PCW_EN_SPI1": {
            "value": "1"
          },
          "PCW_EN_TRACE": {
            "value": "0"
          },
          "PCW_EN_TTC0": {
            "value": "0"
          },
          "PCW_EN_TTC1": {
            "value": "0"
          },
          "PCW_EN_UART0": {
            "value": "1"
          },
          "PCW_EN_UART1": {
            "value": "1"
          },
          "PCW_EN_USB0": {
            "value": "1"
          },
          "PCW_EN_USB1": {
            "value": "0"
          },
          "PCW_EN_WDT": {
            "value": "0"
          },
          "PCW_FCLK0_PERIPHERAL_CLKSRC": {
            "value": "IO PLL"
          },
          "PCW_FCLK1_PERIPHERAL_CLKSRC": {
            "value": "IO PLL"
          },
          "PCW_FCLK2_PERIPHERAL_CLKSRC": {
            "value": "IO PLL"
          },
          "PCW_FCLK3_PERIPHERAL_CLKSRC": {
            "value": "IO PLL"
          },
          "PCW_FCLK_CLK0_BUF": {
            "value": "TRUE"
          },
          "PCW_FPGA0_PERIPHERAL_FREQMHZ": {
            "value": "50"
          },
          "PCW_FPGA1_PERIPHERAL_FREQMHZ": {
            "value": "50"
          },
          "PCW_FPGA2_PERIPHERAL_FREQMHZ": {
            "value": "50"
          },
          "PCW_FPGA3_PERIPHERAL_FREQMHZ": {
            "value": "50"
          },
          "PCW_FPGA_FCLK0_ENABLE": {
            "value": "1"
          },
          "PCW_GPIO_EMIO_GPIO_ENABLE": {
            "value": "1"
          },
          "PCW_GPIO_EMIO_GPIO_IO": {
            "value": "64"
          },
          "PCW_GPIO_EMIO_GPIO_WIDTH": {
            "value": "64"
          },
          "PCW_GPIO_MIO_GPIO_ENABLE": {
            "value": "1"
          },
          "PCW_GPIO_MIO_GPIO_IO": {
            "value": "MIO"
          },
          "PCW_GPIO_PERIPHERAL_ENABLE": {
            "value": "1"
          },
          "PCW_I2C0_GRP_INT_ENABLE": {
            "value": "0"
          },
          "PCW_I2C0_I2C0_IO": {
            "value": "MIO 50 .. 51"
          },
          "PCW_I2C0_PERIPHERAL_ENABLE": {
            "value": "1"
          },
          "PCW_I2C0_RESET_ENABLE": {
            "value": "0"
          },
          "PCW_I2C1_PERIPHERAL_ENABLE": {
            "value": "0"
          },
          "PCW_I2C_PERIPHERAL_FREQMHZ": {
            "value": "111.111115"
          },
          "PCW_I2C_RESET_ENABLE": {
            "value": "1"
          },
          "PCW_I2C_RESET_POLARITY": {
            "value": "Active Low"
          },
          "PCW_I2C_RESET_SELECT": {
            "value": "Share reset pin"
          },
          "PCW_IMPORT_BOARD_PRESET": {
            "value": "cfg/red_pitaya.xml"
          },
          "PCW_IRQ_F2P_MODE": {
            "value": "DIRECT"
          },
          "PCW_MIO_0_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_0_PULLUP": {
            "value": "disabled"
          },
          "PCW_MIO_0_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_10_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_10_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_10_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_11_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_11_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_11_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_12_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_12_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_12_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_13_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_13_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_13_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_14_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_14_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_14_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_15_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_15_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_15_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_16_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_16_PULLUP": {
            "value": "disabled"
          },
          "PCW_MIO_16_SLEW": {
            "value": "fast"
          },
          "PCW_MIO_17_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_17_PULLUP": {
            "value": "disabled"
          },
          "PCW_MIO_17_SLEW": {
            "value": "fast"
          },
          "PCW_MIO_18_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_18_PULLUP": {
            "value": "disabled"
          },
          "PCW_MIO_18_SLEW": {
            "value": "fast"
          },
          "PCW_MIO_19_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_19_PULLUP": {
            "value": "disabled"
          },
          "PCW_MIO_19_SLEW": {
            "value": "fast"
          },
          "PCW_MIO_1_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_1_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_1_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_20_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_20_PULLUP": {
            "value": "disabled"
          },
          "PCW_MIO_20_SLEW": {
            "value": "fast"
          },
          "PCW_MIO_21_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_21_PULLUP": {
            "value": "disabled"
          },
          "PCW_MIO_21_SLEW": {
            "value": "fast"
          },
          "PCW_MIO_22_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_22_PULLUP": {
            "value": "disabled"
          },
          "PCW_MIO_22_SLEW": {
            "value": "fast"
          },
          "PCW_MIO_23_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_23_PULLUP": {
            "value": "disabled"
          },
          "PCW_MIO_23_SLEW": {
            "value": "fast"
          },
          "PCW_MIO_24_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_24_PULLUP": {
            "value": "disabled"
          },
          "PCW_MIO_24_SLEW": {
            "value": "fast"
          },
          "PCW_MIO_25_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_25_PULLUP": {
            "value": "disabled"
          },
          "PCW_MIO_25_SLEW": {
            "value": "fast"
          },
          "PCW_MIO_26_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_26_PULLUP": {
            "value": "disabled"
          },
          "PCW_MIO_26_SLEW": {
            "value": "fast"
          },
          "PCW_MIO_27_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_27_PULLUP": {
            "value": "disabled"
          },
          "PCW_MIO_27_SLEW": {
            "value": "fast"
          },
          "PCW_MIO_28_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_28_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_28_SLEW": {
            "value": "fast"
          },
          "PCW_MIO_29_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_29_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_29_SLEW": {
            "value": "fast"
          },
          "PCW_MIO_2_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_2_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_30_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_30_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_30_SLEW": {
            "value": "fast"
          },
          "PCW_MIO_31_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_31_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_31_SLEW": {
            "value": "fast"
          },
          "PCW_MIO_32_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_32_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_32_SLEW": {
            "value": "fast"
          },
          "PCW_MIO_33_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_33_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_33_SLEW": {
            "value": "fast"
          },
          "PCW_MIO_34_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_34_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_34_SLEW": {
            "value": "fast"
          },
          "PCW_MIO_35_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_35_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_35_SLEW": {
            "value": "fast"
          },
          "PCW_MIO_36_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_36_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_36_SLEW": {
            "value": "fast"
          },
          "PCW_MIO_37_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_37_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_37_SLEW": {
            "value": "fast"
          },
          "PCW_MIO_38_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_38_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_38_SLEW": {
            "value": "fast"
          },
          "PCW_MIO_39_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_39_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_39_SLEW": {
            "value": "fast"
          },
          "PCW_MIO_3_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_3_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_40_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_40_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_40_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_41_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_41_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_41_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_42_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_42_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_42_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_43_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_43_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_43_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_44_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_44_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_44_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_45_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_45_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_45_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_46_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_46_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_46_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_47_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_47_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_47_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_48_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_48_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_48_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_49_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_49_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_49_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_4_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_4_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_50_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_50_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_50_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_51_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_51_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_51_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_52_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_52_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_52_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_53_IOTYPE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_MIO_53_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_53_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_5_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_5_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_6_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_6_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_7_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_7_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_8_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_8_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_9_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_9_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_9_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_TREE_PERIPHERALS": {
            "value": "GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#UART 1#UART 1#SPI 1#SPI 1#SPI 1#SPI 1#UART 0#UART 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#SD 0#SD 0#SD 0#SD 0#SD 0#SD 0#SD 0#SD 0#USB Reset#GPIO#I2C 0#I2C 0#Enet 0#Enet 0"
          },
          "PCW_MIO_TREE_SIGNALS": {
            "value": "gpio[0]#gpio[1]#gpio[2]#gpio[3]#gpio[4]#gpio[5]#gpio[6]#gpio[7]#tx#rx#mosi#miso#sclk#ss[0]#rx#tx#tx_clk#txd[0]#txd[1]#txd[2]#txd[3]#tx_ctl#rx_clk#rxd[0]#rxd[1]#rxd[2]#rxd[3]#rx_ctl#data[4]#dir#stp#nxt#data[0]#data[1]#data[2]#data[3]#clk#data[5]#data[6]#data[7]#clk#cmd#data[0]#data[1]#data[2]#data[3]#cd#wp#reset#gpio[49]#scl#sda#mdc#mdio"
          },
          "PCW_NAND_CYCLES_T_AR": {
            "value": "1"
          },
          "PCW_NAND_CYCLES_T_CLR": {
            "value": "1"
          },
          "PCW_NAND_CYCLES_T_RC": {
            "value": "11"
          },
          "PCW_NAND_CYCLES_T_REA": {
            "value": "1"
          },
          "PCW_NAND_CYCLES_T_RR": {
            "value": "1"
          },
          "PCW_NAND_CYCLES_T_WC": {
            "value": "11"
          },
          "PCW_NAND_CYCLES_T_WP": {
            "value": "1"
          },
          "PCW_NAND_PERIPHERAL_ENABLE": {
            "value": "0"
          },
          "PCW_NOR_CS0_T_CEOE": {
            "value": "1"
          },
          "PCW_NOR_CS0_T_PC": {
            "value": "1"
          },
          "PCW_NOR_CS0_T_RC": {
            "value": "11"
          },
          "PCW_NOR_CS0_T_TR": {
            "value": "1"
          },
          "PCW_NOR_CS0_T_WC": {
            "value": "11"
          },
          "PCW_NOR_CS0_T_WP": {
            "value": "1"
          },
          "PCW_NOR_CS0_WE_TIME": {
            "value": "0"
          },
          "PCW_NOR_CS1_T_CEOE": {
            "value": "1"
          },
          "PCW_NOR_CS1_T_PC": {
            "value": "1"
          },
          "PCW_NOR_CS1_T_RC": {
            "value": "11"
          },
          "PCW_NOR_CS1_T_TR": {
            "value": "1"
          },
          "PCW_NOR_CS1_T_WC": {
            "value": "11"
          },
          "PCW_NOR_CS1_T_WP": {
            "value": "1"
          },
          "PCW_NOR_CS1_WE_TIME": {
            "value": "0"
          },
          "PCW_NOR_PERIPHERAL_ENABLE": {
            "value": "0"
          },
          "PCW_NOR_SRAM_CS0_T_CEOE": {
            "value": "1"
          },
          "PCW_NOR_SRAM_CS0_T_PC": {
            "value": "1"
          },
          "PCW_NOR_SRAM_CS0_T_RC": {
            "value": "11"
          },
          "PCW_NOR_SRAM_CS0_T_TR": {
            "value": "1"
          },
          "PCW_NOR_SRAM_CS0_T_WC": {
            "value": "11"
          },
          "PCW_NOR_SRAM_CS0_T_WP": {
            "value": "1"
          },
          "PCW_NOR_SRAM_CS0_WE_TIME": {
            "value": "0"
          },
          "PCW_NOR_SRAM_CS1_T_CEOE": {
            "value": "1"
          },
          "PCW_NOR_SRAM_CS1_T_PC": {
            "value": "1"
          },
          "PCW_NOR_SRAM_CS1_T_RC": {
            "value": "11"
          },
          "PCW_NOR_SRAM_CS1_T_TR": {
            "value": "1"
          },
          "PCW_NOR_SRAM_CS1_T_WC": {
            "value": "11"
          },
          "PCW_NOR_SRAM_CS1_T_WP": {
            "value": "1"
          },
          "PCW_NOR_SRAM_CS1_WE_TIME": {
            "value": "0"
          },
          "PCW_OVERRIDE_BASIC_CLOCK": {
            "value": "0"
          },
          "PCW_PACKAGE_DDR_BOARD_DELAY0": {
            "value": "0.089"
          },
          "PCW_PACKAGE_DDR_BOARD_DELAY1": {
            "value": "0.075"
          },
          "PCW_PACKAGE_DDR_BOARD_DELAY2": {
            "value": "0.085"
          },
          "PCW_PACKAGE_DDR_BOARD_DELAY3": {
            "value": "0.092"
          },
          "PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_0": {
            "value": "-0.025"
          },
          "PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_1": {
            "value": "0.014"
          },
          "PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_2": {
            "value": "-0.009"
          },
          "PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_3": {
            "value": "-0.033"
          },
          "PCW_PCAP_PERIPHERAL_CLKSRC": {
            "value": "IO PLL"
          },
          "PCW_PCAP_PERIPHERAL_FREQMHZ": {
            "value": "200"
          },
          "PCW_PJTAG_PERIPHERAL_ENABLE": {
            "value": "0"
          },
          "PCW_PLL_BYPASSMODE_ENABLE": {
            "value": "0"
          },
          "PCW_PRESET_BANK0_VOLTAGE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_PRESET_BANK1_VOLTAGE": {
            "value": "LVCMOS 2.5V"
          },
          "PCW_QSPI_INTERNAL_HIGHADDRESS": {
            "value": "0xFCFFFFFF"
          },
          "PCW_QSPI_PERIPHERAL_CLKSRC": {
            "value": "IO PLL"
          },
          "PCW_QSPI_PERIPHERAL_ENABLE": {
            "value": "0"
          },
          "PCW_SD0_GRP_CD_ENABLE": {
            "value": "1"
          },
          "PCW_SD0_GRP_CD_IO": {
            "value": "MIO 46"
          },
          "PCW_SD0_GRP_POW_ENABLE": {
            "value": "0"
          },
          "PCW_SD0_GRP_WP_ENABLE": {
            "value": "1"
          },
          "PCW_SD0_GRP_WP_IO": {
            "value": "MIO 47"
          },
          "PCW_SD0_PERIPHERAL_ENABLE": {
            "value": "1"
          },
          "PCW_SD0_SD0_IO": {
            "value": "MIO 40 .. 45"
          },
          "PCW_SD1_PERIPHERAL_ENABLE": {
            "value": "0"
          },
          "PCW_SDIO_PERIPHERAL_CLKSRC": {
            "value": "IO PLL"
          },
          "PCW_SDIO_PERIPHERAL_FREQMHZ": {
            "value": "100"
          },
          "PCW_SDIO_PERIPHERAL_VALID": {
            "value": "1"
          },
          "PCW_SMC_PERIPHERAL_CLKSRC": {
            "value": "IO PLL"
          },
          "PCW_SMC_PERIPHERAL_VALID": {
            "value": "0"
          },
          "PCW_SPI0_PERIPHERAL_ENABLE": {
            "value": "1"
          },
          "PCW_SPI0_SPI0_IO": {
            "value": "EMIO"
          },
          "PCW_SPI1_GRP_SS1_ENABLE": {
            "value": "0"
          },
          "PCW_SPI1_GRP_SS2_ENABLE": {
            "value": "0"
          },
          "PCW_SPI1_PERIPHERAL_ENABLE": {
            "value": "1"
          },
          "PCW_SPI1_SPI1_IO": {
            "value": "MIO 10 .. 15"
          },
          "PCW_SPI_PERIPHERAL_CLKSRC": {
            "value": "IO PLL"
          },
          "PCW_SPI_PERIPHERAL_FREQMHZ": {
            "value": "166.666666"
          },
          "PCW_SPI_PERIPHERAL_VALID": {
            "value": "1"
          },
          "PCW_S_AXI_HP0_DATA_WIDTH": {
            "value": "64"
          },
          "PCW_S_AXI_HP1_DATA_WIDTH": {
            "value": "64"
          },
          "PCW_S_AXI_HP2_DATA_WIDTH": {
            "value": "64"
          },
          "PCW_S_AXI_HP3_DATA_WIDTH": {
            "value": "64"
          },
          "PCW_TPIU_PERIPHERAL_CLKSRC": {
            "value": "External"
          },
          "PCW_TRACE_INTERNAL_WIDTH": {
            "value": "2"
          },
          "PCW_TRACE_PERIPHERAL_ENABLE": {
            "value": "0"
          },
          "PCW_TTC0_CLK0_PERIPHERAL_CLKSRC": {
            "value": "CPU_1X"
          },
          "PCW_TTC0_CLK0_PERIPHERAL_DIVISOR0": {
            "value": "1"
          },
          "PCW_TTC0_CLK1_PERIPHERAL_CLKSRC": {
            "value": "CPU_1X"
          },
          "PCW_TTC0_CLK1_PERIPHERAL_DIVISOR0": {
            "value": "1"
          },
          "PCW_TTC0_CLK2_PERIPHERAL_CLKSRC": {
            "value": "CPU_1X"
          },
          "PCW_TTC0_CLK2_PERIPHERAL_DIVISOR0": {
            "value": "1"
          },
          "PCW_TTC0_PERIPHERAL_ENABLE": {
            "value": "0"
          },
          "PCW_TTC1_CLK0_PERIPHERAL_CLKSRC": {
            "value": "CPU_1X"
          },
          "PCW_TTC1_CLK0_PERIPHERAL_DIVISOR0": {
            "value": "1"
          },
          "PCW_TTC1_CLK1_PERIPHERAL_CLKSRC": {
            "value": "CPU_1X"
          },
          "PCW_TTC1_CLK1_PERIPHERAL_DIVISOR0": {
            "value": "1"
          },
          "PCW_TTC1_CLK2_PERIPHERAL_CLKSRC": {
            "value": "CPU_1X"
          },
          "PCW_TTC1_CLK2_PERIPHERAL_DIVISOR0": {
            "value": "1"
          },
          "PCW_TTC1_PERIPHERAL_ENABLE": {
            "value": "0"
          },
          "PCW_UART0_BAUD_RATE": {
            "value": "115200"
          },
          "PCW_UART0_GRP_FULL_ENABLE": {
            "value": "0"
          },
          "PCW_UART0_PERIPHERAL_ENABLE": {
            "value": "1"
          },
          "PCW_UART0_UART0_IO": {
            "value": "MIO 14 .. 15"
          },
          "PCW_UART1_BAUD_RATE": {
            "value": "115200"
          },
          "PCW_UART1_GRP_FULL_ENABLE": {
            "value": "0"
          },
          "PCW_UART1_PERIPHERAL_ENABLE": {
            "value": "1"
          },
          "PCW_UART1_UART1_IO": {
            "value": "MIO 8 .. 9"
          },
          "PCW_UART_PERIPHERAL_CLKSRC": {
            "value": "IO PLL"
          },
          "PCW_UART_PERIPHERAL_FREQMHZ": {
            "value": "100"
          },
          "PCW_UART_PERIPHERAL_VALID": {
            "value": "1"
          },
          "PCW_UIPARAM_ACT_DDR_FREQ_MHZ": {
            "value": "533.333374"
          },
          "PCW_UIPARAM_DDR_ADV_ENABLE": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_AL": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_BL": {
            "value": "8"
          },
          "PCW_UIPARAM_DDR_BOARD_DELAY0": {
            "value": "0.25"
          },
          "PCW_UIPARAM_DDR_BOARD_DELAY1": {
            "value": "0.25"
          },
          "PCW_UIPARAM_DDR_BOARD_DELAY2": {
            "value": "0.25"
          },
          "PCW_UIPARAM_DDR_BOARD_DELAY3": {
            "value": "0.25"
          },
          "PCW_UIPARAM_DDR_BUS_WIDTH": {
            "value": "16 Bit"
          },
          "PCW_UIPARAM_DDR_CLOCK_0_LENGTH_MM": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_CLOCK_0_PACKAGE_LENGTH": {
            "value": "80.4535"
          },
          "PCW_UIPARAM_DDR_CLOCK_0_PROPOGATION_DELAY": {
            "value": "160"
          },
          "PCW_UIPARAM_DDR_CLOCK_1_LENGTH_MM": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_CLOCK_1_PACKAGE_LENGTH": {
            "value": "80.4535"
          },
          "PCW_UIPARAM_DDR_CLOCK_1_PROPOGATION_DELAY": {
            "value": "160"
          },
          "PCW_UIPARAM_DDR_CLOCK_2_LENGTH_MM": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_CLOCK_2_PACKAGE_LENGTH": {
            "value": "80.4535"
          },
          "PCW_UIPARAM_DDR_CLOCK_2_PROPOGATION_DELAY": {
            "value": "160"
          },
          "PCW_UIPARAM_DDR_CLOCK_3_LENGTH_MM": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_CLOCK_3_PACKAGE_LENGTH": {
            "value": "80.4535"
          },
          "PCW_UIPARAM_DDR_CLOCK_3_PROPOGATION_DELAY": {
            "value": "160"
          },
          "PCW_UIPARAM_DDR_CLOCK_STOP_EN": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_DQS_0_LENGTH_MM": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_DQS_0_PACKAGE_LENGTH": {
            "value": "105.056"
          },
          "PCW_UIPARAM_DDR_DQS_0_PROPOGATION_DELAY": {
            "value": "160"
          },
          "PCW_UIPARAM_DDR_DQS_1_LENGTH_MM": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_DQS_1_PACKAGE_LENGTH": {
            "value": "66.904"
          },
          "PCW_UIPARAM_DDR_DQS_1_PROPOGATION_DELAY": {
            "value": "160"
          },
          "PCW_UIPARAM_DDR_DQS_2_LENGTH_MM": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_DQS_2_PACKAGE_LENGTH": {
            "value": "89.1715"
          },
          "PCW_UIPARAM_DDR_DQS_2_PROPOGATION_DELAY": {
            "value": "160"
          },
          "PCW_UIPARAM_DDR_DQS_3_LENGTH_MM": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_DQS_3_PACKAGE_LENGTH": {
            "value": "113.63"
          },
          "PCW_UIPARAM_DDR_DQS_3_PROPOGATION_DELAY": {
            "value": "160"
          },
          "PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0": {
            "value": "0.0"
          },
          "PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_1": {
            "value": "0.0"
          },
          "PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2": {
            "value": "0.0"
          },
          "PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3": {
            "value": "0.0"
          },
          "PCW_UIPARAM_DDR_DQ_0_LENGTH_MM": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_DQ_0_PACKAGE_LENGTH": {
            "value": "98.503"
          },
          "PCW_UIPARAM_DDR_DQ_0_PROPOGATION_DELAY": {
            "value": "160"
          },
          "PCW_UIPARAM_DDR_DQ_1_LENGTH_MM": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_DQ_1_PACKAGE_LENGTH": {
            "value": "68.5855"
          },
          "PCW_UIPARAM_DDR_DQ_1_PROPOGATION_DELAY": {
            "value": "160"
          },
          "PCW_UIPARAM_DDR_DQ_2_LENGTH_MM": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_DQ_2_PACKAGE_LENGTH": {
            "value": "90.295"
          },
          "PCW_UIPARAM_DDR_DQ_2_PROPOGATION_DELAY": {
            "value": "160"
          },
          "PCW_UIPARAM_DDR_DQ_3_LENGTH_MM": {
            "value": "0"
          },
          "PCW_UIPARAM_DDR_DQ_3_PACKAGE_LENGTH": {
            "value": "103.977"
          },
          "PCW_UIPARAM_DDR_DQ_3_PROPOGATION_DELAY": {
            "value": "160"
          },
          "PCW_UIPARAM_DDR_ECC": {
            "value": "Disabled"
          },
          "PCW_UIPARAM_DDR_ENABLE": {
            "value": "1"
          },
          "PCW_UIPARAM_DDR_FREQ_MHZ": {
            "value": "533.333333"
          },
          "PCW_UIPARAM_DDR_HIGH_TEMP": {
            "value": "Normal (0-85)"
          },
          "PCW_UIPARAM_DDR_MEMORY_TYPE": {
            "value": "DDR 3"
          },
          "PCW_UIPARAM_DDR_PARTNO": {
            "value": "MT41J256M16 RE-125"
          },
          "PCW_UIPARAM_DDR_TRAIN_DATA_EYE": {
            "value": "1"
          },
          "PCW_UIPARAM_DDR_TRAIN_READ_GATE": {
            "value": "1"
          },
          "PCW_UIPARAM_DDR_TRAIN_WRITE_LEVEL": {
            "value": "1"
          },
          "PCW_UIPARAM_DDR_USE_INTERNAL_VREF": {
            "value": "0"
          },
          "PCW_USB0_PERIPHERAL_ENABLE": {
            "value": "1"
          },
          "PCW_USB0_RESET_ENABLE": {
            "value": "1"
          },
          "PCW_USB0_RESET_IO": {
            "value": "MIO 48"
          },
          "PCW_USB0_USB0_IO": {
            "value": "MIO 28 .. 39"
          },
          "PCW_USB1_PERIPHERAL_ENABLE": {
            "value": "0"
          },
          "PCW_USB_RESET_ENABLE": {
            "value": "1"
          },
          "PCW_USB_RESET_POLARITY": {
            "value": "Active Low"
          },
          "PCW_USB_RESET_SELECT": {
            "value": "Share reset pin"
          },
          "PCW_USE_AXI_NONSECURE": {
            "value": "0"
          },
          "PCW_USE_CROSS_TRIGGER": {
            "value": "0"
          },
          "PCW_USE_DEFAULT_ACP_USER_VAL": {
            "value": "1"
          },
          "PCW_USE_S_AXI_ACP": {
            "value": "1"
          },
          "PCW_WDT_PERIPHERAL_CLKSRC": {
            "value": "CPU_1X"
          },
          "PCW_WDT_PERIPHERAL_DIVISOR0": {
            "value": "1"
          },
          "PCW_WDT_PERIPHERAL_ENABLE": {
            "value": "0"
          }
        },
        "interface_ports": {
          "M_AXI_GP0": {
            "vlnv": "xilinx.com:interface:aximm_rtl:1.0",
            "mode": "Master",
            "address_space_ref": "Data",
            "base_address": {
              "minimum": "0x40000000",
              "maximum": "0x7FFFFFFF",
              "width": "32"
            }
          },
          "S_AXI_ACP": {
            "vlnv": "xilinx.com:interface:aximm_rtl:1.0",
            "mode": "Slave",
            "memory_map_ref": "S_AXI_ACP"
          }
        },
        "addressing": {
          "address_spaces": {
            "Data": {
              "range": "4G",
              "width": "32",
              "local_memory_map": {
                "name": "Data",
                "description": "Address Space Segments",
                "address_blocks": {
                  "segment1": {
                    "name": "segment1",
                    "display_name": "segment1",
                    "base_address": "0x00000000",
                    "range": "256K",
                    "width": "18",
                    "usage": "register"
                  },
                  "segment2": {
                    "name": "segment2",
                    "display_name": "segment2",
                    "base_address": "0x00040000",
                    "range": "256K",
                    "width": "19",
                    "usage": "register"
                  },
                  "segment3": {
                    "name": "segment3",
                    "display_name": "segment3",
                    "base_address": "0x00080000",
                    "range": "512K",
                    "width": "20",
                    "usage": "register"
                  },
                  "segment4": {
                    "name": "segment4",
                    "display_name": "segment4",
                    "base_address": "0x00100000",
                    "range": "1023M",
                    "width": "30",
                    "usage": "register"
                  },
                  "M_AXI_GP0": {
                    "name": "M_AXI_GP0",
                    "display_name": "M_AXI_GP0",
                    "base_address": "0x40000000",
                    "range": "1G",
                    "width": "31",
                    "usage": "register"
                  },
                  "M_AXI_GP1": {
                    "name": "M_AXI_GP1",
                    "display_name": "M_AXI_GP1",
                    "base_address": "0x80000000",
                    "range": "1G",
                    "width": "32",
                    "usage": "register"
                  },
                  "IO_Peripheral_Registers": {
                    "name": "IO_Peripheral_Registers",
                    "display_name": "IO Peripheral Registers",
                    "base_address": "0xE0000000",
                    "range": "3M",
                    "width": "32",
                    "usage": "register"
                  },
                  "SMC_Memories": {
                    "name": "SMC_Memories",
                    "display_name": "SMC Memories",
                    "base_address": "0xE1000000",
                    "range": "80M",
                    "width": "32",
                    "usage": "register"
                  },
                  "SLCR_Registers": {
                    "name": "SLCR_Registers",
                    "display_name": "SLCR Registers",
                    "base_address": "0xF8000000",
                    "range": "3K",
                    "width": "32",
                    "usage": "register"
                  },
                  "PS_System_Registers": {
                    "name": "PS_System_Registers",
                    "display_name": "PS System Registers",
                    "base_address": "0xF8001000",
                    "range": "8252K",
                    "width": "32",
                    "usage": "register"
                  },
                  "CPU_Private_Registers": {
                    "name": "CPU_Private_Registers",
                    "display_name": "CPU Private Registers",
                    "base_address": "0xF8900000",
                    "range": "6156K",
                    "width": "32",
                    "usage": "register"
                  },
                  "segment5": {
                    "name": "segment5",
                    "display_name": "segment5",
                    "base_address": "0xFC000000",
                    "range": "32M",
                    "width": "32",
                    "usage": "register"
                  },
                  "segment6": {
                    "name": "segment6",
                    "display_name": "segment6",
                    "base_address": "0xFFFC0000",
                    "range": "256K",
                    "width": "32",
                    "usage": "register"
                  }
                }
              }
            }
          }
        }
      },
      "const_0": {
        "vlnv": "xilinx.com:ip:xlconstant:1.1",
        "xci_name": "system_const_0_0",
        "xci_path": "ip/system_const_0_0/system_const_0_0.xci",
        "inst_hier_path": "const_0"
      },
      "rst_0": {
        "vlnv": "xilinx.com:ip:proc_sys_reset:5.0",
        "xci_name": "system_rst_0_0",
        "xci_path": "ip/system_rst_0_0/system_rst_0_0.xci",
        "inst_hier_path": "rst_0"
      },
      "adc_0": {
        "vlnv": "pavel-demin:user:axis_red_pitaya_adc:1.0",
        "xci_name": "system_adc_0_0",
        "xci_path": "ip/system_adc_0_0/system_adc_0_0.xci",
        "inst_hier_path": "adc_0",
        "parameters": {
          "ADC_DATA_WIDTH": {
            "value": "16"
          }
        }
      },
      "dac_0": {
        "vlnv": "pavel-demin:user:axis_red_pitaya_dac:1.0",
        "xci_name": "system_dac_0_0",
        "xci_path": "ip/system_dac_0_0/system_dac_0_0.xci",
        "inst_hier_path": "dac_0",
        "parameters": {
          "DAC_DATA_WIDTH": {
            "value": "14"
          }
        }
      },
      "hub_0": {
        "vlnv": "pavel-demin:user:axi_hub:1.0",
        "xci_name": "system_hub_0_0",
        "xci_path": "ip/system_hub_0_0/system_hub_0_0.xci",
        "inst_hier_path": "hub_0",
        "parameters": {
          "CFG_DATA_WIDTH": {
            "value": "224"
          },
          "STS_DATA_WIDTH": {
            "value": "32"
          }
        }
      },
      "slice_0": {
        "vlnv": "pavel-demin:user:port_slicer:1.0",
        "xci_name": "system_slice_0_0",
        "xci_path": "ip/system_slice_0_0/system_slice_0_0.xci",
        "inst_hier_path": "slice_0",
        "parameters": {
          "DIN_FROM": {
            "value": "0"
          },
          "DIN_TO": {
            "value": "0"
          },
          "DIN_WIDTH": {
            "value": "224"
          }
        }
      },
      "slice_1": {
        "vlnv": "pavel-demin:user:port_slicer:1.0",
        "xci_name": "system_slice_1_0",
        "xci_path": "ip/system_slice_1_0/system_slice_1_0.xci",
        "inst_hier_path": "slice_1",
        "parameters": {
          "DIN_FROM": {
            "value": "1"
          },
          "DIN_TO": {
            "value": "1"
          },
          "DIN_WIDTH": {
            "value": "224"
          }
        }
      },
      "slice_2": {
        "vlnv": "pavel-demin:user:port_slicer:1.0",
        "xci_name": "system_slice_2_0",
        "xci_path": "ip/system_slice_2_0/system_slice_2_0.xci",
        "inst_hier_path": "slice_2",
        "parameters": {
          "DIN_FROM": {
            "value": "31"
          },
          "DIN_TO": {
            "value": "16"
          },
          "DIN_WIDTH": {
            "value": "224"
          }
        }
      },
      "slice_3": {
        "vlnv": "pavel-demin:user:port_slicer:1.0",
        "xci_name": "system_slice_3_0",
        "xci_path": "ip/system_slice_3_0/system_slice_3_0.xci",
        "inst_hier_path": "slice_3",
        "parameters": {
          "DIN_FROM": {
            "value": "63"
          },
          "DIN_TO": {
            "value": "32"
          },
          "DIN_WIDTH": {
            "value": "224"
          }
        }
      },
      "slice_4": {
        "vlnv": "pavel-demin:user:port_slicer:1.0",
        "xci_name": "system_slice_4_0",
        "xci_path": "ip/system_slice_4_0/system_slice_4_0.xci",
        "inst_hier_path": "slice_4",
        "parameters": {
          "DIN_FROM": {
            "value": "95"
          },
          "DIN_TO": {
            "value": "64"
          },
          "DIN_WIDTH": {
            "value": "224"
          }
        }
      },
      "dds_0": {
        "vlnv": "pavel-demin:user:dds:1.0",
        "xci_name": "system_dds_0_0",
        "xci_path": "ip/system_dds_0_0/system_dds_0_0.xci",
        "inst_hier_path": "dds_0",
        "parameters": {
          "NEGATIVE_SINE": {
            "value": "TRUE"
          }
        }
      },
      "slice_5": {
        "vlnv": "pavel-demin:user:port_slicer:1.0",
        "xci_name": "system_slice_5_0",
        "xci_path": "ip/system_slice_5_0/system_slice_5_0.xci",
        "inst_hier_path": "slice_5",
        "parameters": {
          "DIN_FROM": {
            "value": "127"
          },
          "DIN_TO": {
            "value": "96"
          },
          "DIN_WIDTH": {
            "value": "224"
          }
        }
      },
      "dds_1": {
        "vlnv": "pavel-demin:user:dds:1.0",
        "xci_name": "system_dds_1_0",
        "xci_path": "ip/system_dds_1_0/system_dds_1_0.xci",
        "inst_hier_path": "dds_1",
        "parameters": {
          "NEGATIVE_SINE": {
            "value": "TRUE"
          }
        }
      },
      "slice_6": {
        "vlnv": "pavel-demin:user:port_slicer:1.0",
        "xci_name": "system_slice_6_0",
        "xci_path": "ip/system_slice_6_0/system_slice_6_0.xci",
        "inst_hier_path": "slice_6",
        "parameters": {
          "DIN_FROM": {
            "value": "159"
          },
          "DIN_TO": {
            "value": "128"
          },
          "DIN_WIDTH": {
            "value": "224"
          }
        }
      },
      "dds_2": {
        "vlnv": "pavel-demin:user:dds:1.0",
        "xci_name": "system_dds_2_0",
        "xci_path": "ip/system_dds_2_0/system_dds_2_0.xci",
        "inst_hier_path": "dds_2",
        "parameters": {
          "NEGATIVE_SINE": {
            "value": "TRUE"
          }
        }
      },
      "slice_7": {
        "vlnv": "pavel-demin:user:port_slicer:1.0",
        "xci_name": "system_slice_7_0",
        "xci_path": "ip/system_slice_7_0/system_slice_7_0.xci",
        "inst_hier_path": "slice_7",
        "parameters": {
          "DIN_FROM": {
            "value": "191"
          },
          "DIN_TO": {
            "value": "160"
          },
          "DIN_WIDTH": {
            "value": "224"
          }
        }
      },
      "dds_3": {
        "vlnv": "pavel-demin:user:dds:1.0",
        "xci_name": "system_dds_3_0",
        "xci_path": "ip/system_dds_3_0/system_dds_3_0.xci",
        "inst_hier_path": "dds_3",
        "parameters": {
          "NEGATIVE_SINE": {
            "value": "TRUE"
          }
        }
      },
      "adc_slice_0": {
        "vlnv": "pavel-demin:user:port_slicer:1.0",
        "xci_name": "system_adc_slice_0_0",
        "xci_path": "ip/system_adc_slice_0_0/system_adc_slice_0_0.xci",
        "inst_hier_path": "adc_slice_0",
        "parameters": {
          "DIN_FROM": {
            "value": "15"
          },
          "DIN_TO": {
            "value": "0"
          },
          "DIN_WIDTH": {
            "value": "32"
          }
        }
      },
      "dds_slice_0": {
        "vlnv": "pavel-demin:user:port_slicer:1.0",
        "xci_name": "system_dds_slice_0_0",
        "xci_path": "ip/system_dds_slice_0_0/system_dds_slice_0_0.xci",
        "inst_hier_path": "dds_slice_0",
        "parameters": {
          "DIN_FROM": {
            "value": "23"
          },
          "DIN_TO": {
            "value": "0"
          },
          "DIN_WIDTH": {
            "value": "48"
          }
        }
      },
      "mult_0": {
        "vlnv": "pavel-demin:user:dsp48:1.0",
        "xci_name": "system_mult_0_0",
        "xci_path": "ip/system_mult_0_0/system_mult_0_0.xci",
        "inst_hier_path": "mult_0",
        "parameters": {
          "A_WIDTH": {
            "value": "24"
          },
          "B_WIDTH": {
            "value": "16"
          },
          "P_WIDTH": {
            "value": "24"
          }
        }
      },
      "rate_0": {
        "vlnv": "pavel-demin:user:axis_variable:1.0",
        "xci_name": "system_rate_0_0",
        "xci_path": "ip/system_rate_0_0/system_rate_0_0.xci",
        "inst_hier_path": "rate_0",
        "parameters": {
          "AXIS_TDATA_WIDTH": {
            "value": "16"
          }
        }
      },
      "cic_0": {
        "vlnv": "xilinx.com:ip:cic_compiler:4.0",
        "xci_name": "system_cic_0_0",
        "xci_path": "ip/system_cic_0_0/system_cic_0_0.xci",
        "inst_hier_path": "cic_0",
        "parameters": {
          "Clock_Frequency": {
            "value": "122.88"
          },
          "Filter_Type": {
            "value": "Decimation"
          },
          "Fixed_Or_Initial_Rate": {
            "value": "4"
          },
          "HAS_ARESETN": {
            "value": "true"
          },
          "Input_Data_Width": {
            "value": "24"
          },
          "Input_Sample_Frequency": {
            "value": "122.88"
          },
          "Maximum_Rate": {
            "value": "64"
          },
          "Minimum_Rate": {
            "value": "4"
          },
          "Number_Of_Stages": {
            "value": "6"
          },
          "Output_Data_Width": {
            "value": "32"
          },
          "Quantization": {
            "value": "Truncation"
          },
          "Sample_Rate_Changes": {
            "value": "Programmable"
          },
          "Use_Xtreme_DSP_Slice": {
            "value": "false"
          }
        }
      },
      "adc_slice_1": {
        "vlnv": "pavel-demin:user:port_slicer:1.0",
        "xci_name": "system_adc_slice_1_0",
        "xci_path": "ip/system_adc_slice_1_0/system_adc_slice_1_0.xci",
        "inst_hier_path": "adc_slice_1",
        "parameters": {
          "DIN_FROM": {
            "value": "15"
          },
          "DIN_TO": {
            "value": "0"
          },
          "DIN_WIDTH": {
            "value": "32"
          }
        }
      },
      "dds_slice_1": {
        "vlnv": "pavel-demin:user:port_slicer:1.0",
        "xci_name": "system_dds_slice_1_0",
        "xci_path": "ip/system_dds_slice_1_0/system_dds_slice_1_0.xci",
        "inst_hier_path": "dds_slice_1",
        "parameters": {
          "DIN_FROM": {
            "value": "47"
          },
          "DIN_TO": {
            "value": "24"
          },
          "DIN_WIDTH": {
            "value": "48"
          }
        }
      },
      "mult_1": {
        "vlnv": "pavel-demin:user:dsp48:1.0",
        "xci_name": "system_mult_1_0",
        "xci_path": "ip/system_mult_1_0/system_mult_1_0.xci",
        "inst_hier_path": "mult_1",
        "parameters": {
          "A_WIDTH": {
            "value": "24"
          },
          "B_WIDTH": {
            "value": "16"
          },
          "P_WIDTH": {
            "value": "24"
          }
        }
      },
      "rate_1": {
        "vlnv": "pavel-demin:user:axis_variable:1.0",
        "xci_name": "system_rate_1_0",
        "xci_path": "ip/system_rate_1_0/system_rate_1_0.xci",
        "inst_hier_path": "rate_1",
        "parameters": {
          "AXIS_TDATA_WIDTH": {
            "value": "16"
          }
        }
      },
      "cic_1": {
        "vlnv": "xilinx.com:ip:cic_compiler:4.0",
        "xci_name": "system_cic_1_0",
        "xci_path": "ip/system_cic_1_0/system_cic_1_0.xci",
        "inst_hier_path": "cic_1",
        "parameters": {
          "Clock_Frequency": {
            "value": "122.88"
          },
          "Filter_Type": {
            "value": "Decimation"
          },
          "Fixed_Or_Initial_Rate": {
            "value": "4"
          },
          "HAS_ARESETN": {
            "value": "true"
          },
          "Input_Data_Width": {
            "value": "24"
          },
          "Input_Sample_Frequency": {
            "value": "122.88"
          },
          "Maximum_Rate": {
            "value": "64"
          },
          "Minimum_Rate": {
            "value": "4"
          },
          "Number_Of_Stages": {
            "value": "6"
          },
          "Output_Data_Width": {
            "value": "32"
          },
          "Quantization": {
            "value": "Truncation"
          },
          "Sample_Rate_Changes": {
            "value": "Programmable"
          },
          "Use_Xtreme_DSP_Slice": {
            "value": "false"
          }
        }
      },
      "adc_slice_2": {
        "vlnv": "pavel-demin:user:port_slicer:1.0",
        "xci_name": "system_adc_slice_2_0",
        "xci_path": "ip/system_adc_slice_2_0/system_adc_slice_2_0.xci",
        "inst_hier_path": "adc_slice_2",
        "parameters": {
          "DIN_FROM": {
            "value": "31"
          },
          "DIN_TO": {
            "value": "16"
          },
          "DIN_WIDTH": {
            "value": "32"
          }
        }
      },
      "dds_slice_2": {
        "vlnv": "pavel-demin:user:port_slicer:1.0",
        "xci_name": "system_dds_slice_2_0",
        "xci_path": "ip/system_dds_slice_2_0/system_dds_slice_2_0.xci",
        "inst_hier_path": "dds_slice_2",
        "parameters": {
          "DIN_FROM": {
            "value": "23"
          },
          "DIN_TO": {
            "value": "0"
          },
          "DIN_WIDTH": {
            "value": "48"
          }
        }
      },
      "mult_2": {
        "vlnv": "pavel-demin:user:dsp48:1.0",
        "xci_name": "system_mult_2_0",
        "xci_path": "ip/system_mult_2_0/system_mult_2_0.xci",
        "inst_hier_path": "mult_2",
        "parameters": {
          "A_WIDTH": {
            "value": "24"
          },
          "B_WIDTH": {
            "value": "16"
          },
          "P_WIDTH": {
            "value": "24"
          }
        }
      },
      "rate_2": {
        "vlnv": "pavel-demin:user:axis_variable:1.0",
        "xci_name": "system_rate_2_0",
        "xci_path": "ip/system_rate_2_0/system_rate_2_0.xci",
        "inst_hier_path": "rate_2",
        "parameters": {
          "AXIS_TDATA_WIDTH": {
            "value": "16"
          }
        }
      },
      "cic_2": {
        "vlnv": "xilinx.com:ip:cic_compiler:4.0",
        "xci_name": "system_cic_2_0",
        "xci_path": "ip/system_cic_2_0/system_cic_2_0.xci",
        "inst_hier_path": "cic_2",
        "parameters": {
          "Clock_Frequency": {
            "value": "122.88"
          },
          "Filter_Type": {
            "value": "Decimation"
          },
          "Fixed_Or_Initial_Rate": {
            "value": "4"
          },
          "HAS_ARESETN": {
            "value": "true"
          },
          "Input_Data_Width": {
            "value": "24"
          },
          "Input_Sample_Frequency": {
            "value": "122.88"
          },
          "Maximum_Rate": {
            "value": "64"
          },
          "Minimum_Rate": {
            "value": "4"
          },
          "Number_Of_Stages": {
            "value": "6"
          },
          "Output_Data_Width": {
            "value": "32"
          },
          "Quantization": {
            "value": "Truncation"
          },
          "Sample_Rate_Changes": {
            "value": "Programmable"
          },
          "Use_Xtreme_DSP_Slice": {
            "value": "false"
          }
        }
      },
      "adc_slice_3": {
        "vlnv": "pavel-demin:user:port_slicer:1.0",
        "xci_name": "system_adc_slice_3_0",
        "xci_path": "ip/system_adc_slice_3_0/system_adc_slice_3_0.xci",
        "inst_hier_path": "adc_slice_3",
        "parameters": {
          "DIN_FROM": {
            "value": "31"
          },
          "DIN_TO": {
            "value": "16"
          },
          "DIN_WIDTH": {
            "value": "32"
          }
        }
      },
      "dds_slice_3": {
        "vlnv": "pavel-demin:user:port_slicer:1.0",
        "xci_name": "system_dds_slice_3_0",
        "xci_path": "ip/system_dds_slice_3_0/system_dds_slice_3_0.xci",
        "inst_hier_path": "dds_slice_3",
        "parameters": {
          "DIN_FROM": {
            "value": "47"
          },
          "DIN_TO": {
            "value": "24"
          },
          "DIN_WIDTH": {
            "value": "48"
          }
        }
      },
      "mult_3": {
        "vlnv": "pavel-demin:user:dsp48:1.0",
        "xci_name": "system_mult_3_0",
        "xci_path": "ip/system_mult_3_0/system_mult_3_0.xci",
        "inst_hier_path": "mult_3",
        "parameters": {
          "A_WIDTH": {
            "value": "24"
          },
          "B_WIDTH": {
            "value": "16"
          },
          "P_WIDTH": {
            "value": "24"
          }
        }
      },
      "rate_3": {
        "vlnv": "pavel-demin:user:axis_variable:1.0",
        "xci_name": "system_rate_3_0",
        "xci_path": "ip/system_rate_3_0/system_rate_3_0.xci",
        "inst_hier_path": "rate_3",
        "parameters": {
          "AXIS_TDATA_WIDTH": {
            "value": "16"
          }
        }
      },
      "cic_3": {
        "vlnv": "xilinx.com:ip:cic_compiler:4.0",
        "xci_name": "system_cic_3_0",
        "xci_path": "ip/system_cic_3_0/system_cic_3_0.xci",
        "inst_hier_path": "cic_3",
        "parameters": {
          "Clock_Frequency": {
            "value": "122.88"
          },
          "Filter_Type": {
            "value": "Decimation"
          },
          "Fixed_Or_Initial_Rate": {
            "value": "4"
          },
          "HAS_ARESETN": {
            "value": "true"
          },
          "Input_Data_Width": {
            "value": "24"
          },
          "Input_Sample_Frequency": {
            "value": "122.88"
          },
          "Maximum_Rate": {
            "value": "64"
          },
          "Minimum_Rate": {
            "value": "4"
          },
          "Number_Of_Stages": {
            "value": "6"
          },
          "Output_Data_Width": {
            "value": "32"
          },
          "Quantization": {
            "value": "Truncation"
          },
          "Sample_Rate_Changes": {
            "value": "Programmable"
          },
          "Use_Xtreme_DSP_Slice": {
            "value": "false"
          }
        }
      },
      "comb_0": {
        "vlnv": "xilinx.com:ip:axis_combiner:1.1",
        "xci_name": "system_comb_0_0",
        "xci_path": "ip/system_comb_0_0/system_comb_0_0.xci",
        "inst_hier_path": "comb_0",
        "parameters": {
          "NUM_SI": {
            "value": "4"
          },
          "TDATA_NUM_BYTES": {
            "value": "4"
          }
        }
      },
      "fir_0": {
        "vlnv": "xilinx.com:ip:fir_compiler:7.2",
        "xci_name": "system_fir_0_0",
        "xci_path": "ip/system_fir_0_0/system_fir_0_0.xci",
        "inst_hier_path": "fir_0",
        "parameters": {
          "BestPrecision": {
            "value": "true"
          },
          "Clock_Frequency": {
            "value": "122.88"
          },
          "CoefficientVector": {
            "value": "-4.3206471974e-08, 1.9581108834e-08, 3.8109090962e-08, 1.4084131418e-09, 1.2186120186e-08, -4.3002365521e-08, -1.3853077565e-07, 1.0133745579e-07, 3.7888894052e-07, -1.6394613230e-07, -7.7661761489e-07, 2.0712149544e-07, 1.3774224210e-06, -1.9384365527e-07, -2.2249377290e-06, 7.2763377227e-08, 3.3549988889e-06, 2.2117927620e-07, -4.7889010594e-06, -7.6397724595e-07, 6.5260611238e-06, 1.6368965465e-06, -8.5375061091e-06, -2.9191987685e-06, 1.0758341788e-05, 4.6752496998e-06, -1.3084991486e-05, -6.9412383420e-06, 1.5373724961e-05, 9.7084647273e-06, -1.7443962288e-05, -1.2905490830e-05, 1.9086646276e-05, 1.6380162505e-05, -2.0078608383e-05, -1.9883422927e-05, 2.0203022903e-05, 2.3056727953e-05, -1.9275907764e-05, -2.5425425753e-05, 1.7177613167e-05, 2.6400053739e-05, -1.3887984508e-05, -2.5287767236e-05, 9.5223982251e-06, 2.1313177486e-05, -4.3728197481e-06, -1.3665196308e-05, -1.0766754409e-06, 1.5310917825e-06, 6.1157778312e-06, 1.5831781930e-05, -9.8065695691e-06, -3.9025740577e-05, 1.0994139826e-05, 6.8433254890e-05, -8.3394585095e-06, -1.0413520871e-04, 3.7650515294e-07, 1.4583183818e-04, 1.4403443484e-05, -1.9277411182e-04, -3.7440682291e-05, 2.4371243539e-04, 6.9969543240e-05, -2.9687173927e-04, -1.1285857228e-04, 3.4996062912e-04, 1.6643173499e-04, -4.0023458429e-04, -2.3031764274e-04, 4.4453252714e-04, 3.0318466104e-04, -4.7951215941e-04, -3.8264756455e-04, 5.0179308310e-04, 4.6508817914e-04, -5.0822117940e-04, -5.4554763871e-04, 4.9616951008e-04, 6.1766717590e-04, -4.6388070868e-04, -6.7369245331e-04, 4.1083915738e-04, 7.0454923950e-04, -3.3816268708e-04, -6.9999979578e-04, 2.4899722791e-04, 6.4888144112e-04, -1.4890118284e-04, -5.3942758146e-04, 4.6206061884e-05, 3.5965967563e-04, 4.7605082323e-05, -9.8021126546e-05, -1.1791553911e-04, -2.5647044402e-04, 1.4635687092e-04, 7.1327754530e-04, -1.1093829736e-04, -1.2799048805e-03, -1.4106495666e-05, 1.9613024094e-03, 2.5839388583e-04, -2.7593013177e-03, -6.5548048055e-04, 3.6720962046e-03, 1.2430372921e-03, -4.6937909542e-03, -2.0632159584e-03, 5.8140101675e-03, 3.1633610776e-03, -7.0175713933e-03, -4.5973156063e-03, 8.2841916600e-03, 6.4277320980e-03, -9.5881685667e-03, -8.7303353142e-03, 1.0896800128e-02, 1.1598799243e-02, -1.2171477770e-02, -1.5158439259e-02, 1.3362938210e-02, 1.9583979076e-02, -1.4406996028e-02, -2.5135038845e-02, 1.5213119554e-02, 3.2223155290e-02, -1.5638192699e-02, -4.1549149361e-02, 1.5420585824e-02, 5.4413218064e-02, -1.3991942256e-02, -7.3511311682e-02, 9.8306147091e-03, 1.0538098831e-01, 2.4767895457e-03, -1.7013983793e-01, -5.3519295197e-02, 3.5729875325e-01, 5.9530013734e-01, 3.5729875325e-01, -5.3519295197e-02, -1.7013983793e-01, 2.4767895457e-03, 1.0538098831e-01, 9.8306147091e-03, -7.3511311682e-02, -1.3991942256e-02, 5.4413218064e-02, 1.5420585824e-02, -4.1549149361e-02, -1.5638192699e-02, 3.2223155290e-02, 1.5213119554e-02, -2.5135038845e-02, -1.4406996028e-02, 1.9583979076e-02, 1.3362938210e-02, -1.5158439259e-02, -1.2171477770e-02, 1.1598799243e-02, 1.0896800128e-02, -8.7303353142e-03, -9.5881685667e-03, 6.4277320980e-03, 8.2841916600e-03, -4.5973156063e-03, -7.0175713933e-03, 3.1633610776e-03, 5.8140101675e-03, -2.0632159584e-03, -4.6937909542e-03, 1.2430372921e-03, 3.6720962046e-03, -6.5548048055e-04, -2.7593013177e-03, 2.5839388583e-04, 1.9613024094e-03, -1.4106495666e-05, -1.2799048805e-03, -1.1093829736e-04, 7.1327754530e-04, 1.4635687092e-04, -2.5647044402e-04, -1.1791553911e-04, -9.8021126546e-05, 4.7605082323e-05, 3.5965967563e-04, 4.6206061884e-05, -5.3942758146e-04, -1.4890118284e-04, 6.4888144112e-04, 2.4899722791e-04, -6.9999979578e-04, -3.3816268708e-04, 7.0454923950e-04, 4.1083915738e-04, -6.7369245331e-04, -4.6388070868e-04, 6.1766717590e-04, 4.9616951008e-04, -5.4554763871e-04, -5.0822117940e-04, 4.6508817914e-04, 5.0179308310e-04, -3.8264756455e-04, -4.7951215941e-04, 3.0318466104e-04, 4.4453252714e-04, -2.3031764274e-04, -4.0023458429e-04, 1.6643173499e-04, 3.4996062912e-04, -1.1285857228e-04, -2.9687173927e-04, 6.9969543240e-05, 2.4371243539e-04, -3.7440682291e-05, -1.9277411182e-04, 1.4403443484e-05, 1.4583183818e-04, 3.7650515294e-07, -1.0413520871e-04, -8.3394585095e-06, 6.8433254890e-05, 1.0994139826e-05, -3.9025740577e-05, -9.8065695691e-06, 1.5831781930e-05, 6.1157778312e-06, 1.5310917825e-06, -1.0766754409e-06, -1.3665196308e-05, -4.3728197481e-06, 2.1313177486e-05, 9.5223982251e-06, -2.5287767236e-05, -1.3887984508e-05, 2.6400053739e-05, 1.7177613167e-05, -2.5425425753e-05, -1.9275907764e-05, 2.3056727953e-05, 2.0203022903e-05, -1.9883422927e-05, -2.0078608383e-05, 1.6380162505e-05, 1.9086646276e-05, -1.2905490830e-05, -1.7443962288e-05, 9.7084647273e-06, 1.5373724961e-05, -6.9412383420e-06, -1.3084991486e-05, 4.6752496998e-06, 1.0758341788e-05, -2.9191987685e-06, -8.5375061091e-06, 1.6368965465e-06, 6.5260611238e-06, -7.6397724595e-07, -4.7889010594e-06, 2.2117927620e-07, 3.3549988889e-06, 7.2763377227e-08, -2.2249377290e-06, -1.9384365527e-07, 1.3774224210e-06, 2.0712149544e-07, -7.7661761489e-07, -1.6394613230e-07, 3.7888894052e-07, 1.0133745579e-07, -1.3853077565e-07, -4.3002365521e-08, 1.2186120186e-08, 1.4084131418e-09, 3.8109090962e-08, 1.9581108834e-08, -4.3206471974e-08"
          },
          "Coefficient_Width": {
            "value": "24"
          },
          "Data_Width": {
            "value": "32"
          },
          "Decimation_Rate": {
            "value": "2"
          },
          "Filter_Type": {
            "value": "Decimation"
          },
          "Has_ARESETn": {
            "value": "true"
          },
          "M_DATA_Has_TREADY": {
            "value": "true"
          },
          "Number_Channels": {
            "value": "1"
          },
          "Number_Paths": {
            "value": "4"
          },
          "Output_Rounding_Mode": {
            "value": "Convergent_Rounding_to_Even"
          },
          "Output_Width": {
            "value": "18"
          },
          "Quantization": {
            "value": "Quantize_Only"
          },
          "Sample_Frequency": {
            "value": "30.72"
          }
        }
      },
      "subset_0": {
        "vlnv": "xilinx.com:ip:axis_subset_converter:1.1",
        "xci_name": "system_subset_0_0",
        "xci_path": "ip/system_subset_0_0/system_subset_0_0.xci",
        "inst_hier_path": "subset_0",
        "parameters": {
          "M_TDATA_NUM_BYTES": {
            "value": "8"
          },
          "S_TDATA_NUM_BYTES": {
            "value": "12"
          },
          "TDATA_REMAP": {
            "value": "tdata[87:72],tdata[63:48],tdata[39:24],tdata[15:0]"
          }
        }
      },
      "const_1": {
        "vlnv": "xilinx.com:ip:xlconstant:1.1",
        "xci_name": "system_const_1_0",
        "xci_path": "ip/system_const_1_0/system_const_1_0.xci",
        "inst_hier_path": "const_1",
        "parameters": {
          "CONST_VAL": {
            "value": "65535"
          },
          "CONST_WIDTH": {
            "value": "16"
          }
        }
      },
      "writer_0": {
        "vlnv": "pavel-demin:user:axis_ram_writer:1.0",
        "xci_name": "system_writer_0_0",
        "xci_path": "ip/system_writer_0_0/system_writer_0_0.xci",
        "inst_hier_path": "writer_0",
        "parameters": {
          "ADDR_WIDTH": {
            "value": "16"
          },
          "AXIS_TDATA_WIDTH": {
            "value": "64"
          },
          "AXI_ID_WIDTH": {
            "value": "3"
          },
          "FIFO_WRITE_DEPTH": {
            "value": "512"
          }
        },
        "interface_ports": {
          "m_axi": {
            "vlnv": "xilinx.com:interface:aximm_rtl:1.0",
            "mode": "Master",
            "address_space_ref": "m_axi",
            "base_address": {
              "minimum": "0x00000000",
              "maximum": "0xFFFFFFFF",
              "width": "32"
            }
          }
        },
        "addressing": {
          "address_spaces": {
            "m_axi": {
              "range": "4G",
              "width": "32"
            }
          }
        }
      },
      "slice_8": {
        "vlnv": "pavel-demin:user:port_slicer:1.0",
        "xci_name": "system_slice_8_0",
        "xci_path": "ip/system_slice_8_0/system_slice_8_0.xci",
        "inst_hier_path": "slice_8",
        "parameters": {
          "DIN_FROM": {
            "value": "207"
          },
          "DIN_TO": {
            "value": "192"
          },
          "DIN_WIDTH": {
            "value": "224"
          }
        }
      },
      "mult_4": {
        "vlnv": "pavel-demin:user:dsp48:1.0",
        "xci_name": "system_mult_4_0",
        "xci_path": "ip/system_mult_4_0/system_mult_4_0.xci",
        "inst_hier_path": "mult_4",
        "parameters": {
          "A_WIDTH": {
            "value": "24"
          },
          "B_WIDTH": {
            "value": "16"
          },
          "P_WIDTH": {
            "value": "14"
          }
        }
      },
      "slice_9": {
        "vlnv": "pavel-demin:user:port_slicer:1.0",
        "xci_name": "system_slice_9_0",
        "xci_path": "ip/system_slice_9_0/system_slice_9_0.xci",
        "inst_hier_path": "slice_9",
        "parameters": {
          "DIN_FROM": {
            "value": "223"
          },
          "DIN_TO": {
            "value": "208"
          },
          "DIN_WIDTH": {
            "value": "224"
          }
        }
      },
      "mult_5": {
        "vlnv": "pavel-demin:user:dsp48:1.0",
        "xci_name": "system_mult_5_0",
        "xci_path": "ip/system_mult_5_0/system_mult_5_0.xci",
        "inst_hier_path": "mult_5",
        "parameters": {
          "A_WIDTH": {
            "value": "24"
          },
          "B_WIDTH": {
            "value": "16"
          },
          "P_WIDTH": {
            "value": "14"
          }
        }
      },
      "concat_0": {
        "vlnv": "xilinx.com:ip:xlconcat:2.1",
        "xci_name": "system_concat_0_0",
        "xci_path": "ip/system_concat_0_0/system_concat_0_0.xci",
        "inst_hier_path": "concat_0",
        "parameters": {
          "IN0_WIDTH": {
            "value": "16"
          },
          "IN1_WIDTH": {
            "value": "16"
          },
          "NUM_PORTS": {
            "value": "2"
          }
        }
      }
    },
    "interface_nets": {
      "cic_0_M_AXIS_DATA": {
        "interface_ports": [
          "comb_0/S00_AXIS",
          "cic_0/M_AXIS_DATA"
        ]
      },
      "cic_1_M_AXIS_DATA": {
        "interface_ports": [
          "comb_0/S01_AXIS",
          "cic_1/M_AXIS_DATA"
        ]
      },
      "cic_2_M_AXIS_DATA": {
        "interface_ports": [
          "comb_0/S02_AXIS",
          "cic_2/M_AXIS_DATA"
        ]
      },
      "cic_3_M_AXIS_DATA": {
        "interface_ports": [
          "comb_0/S03_AXIS",
          "cic_3/M_AXIS_DATA"
        ]
      },
      "comb_0_M_AXIS": {
        "interface_ports": [
          "fir_0/S_AXIS_DATA",
          "comb_0/M_AXIS"
        ]
      },
      "fir_0_M_AXIS_DATA": {
        "interface_ports": [
          "subset_0/S_AXIS",
          "fir_0/M_AXIS_DATA"
        ]
      },
      "ps_0_DDR": {
        "interface_ports": [
          "DDR",
          "ps_0/DDR"
        ]
      },
      "ps_0_FIXED_IO": {
        "interface_ports": [
          "FIXED_IO",
          "ps_0/FIXED_IO"
        ]
      },
      "ps_0_M_AXI_GP0": {
        "interface_ports": [
          "hub_0/s_axi",
          "ps_0/M_AXI_GP0"
        ]
      },
      "rate_0_m_axis": {
        "interface_ports": [
          "cic_0/S_AXIS_CONFIG",
          "rate_0/m_axis"
        ]
      },
      "rate_1_m_axis": {
        "interface_ports": [
          "cic_1/S_AXIS_CONFIG",
          "rate_1/m_axis"
        ]
      },
      "rate_2_m_axis": {
        "interface_ports": [
          "cic_2/S_AXIS_CONFIG",
          "rate_2/m_axis"
        ]
      },
      "rate_3_m_axis": {
        "interface_ports": [
          "cic_3/S_AXIS_CONFIG",
          "rate_3/m_axis"
        ]
      },
      "subset_0_M_AXIS": {
        "interface_ports": [
          "writer_0/s_axis",
          "subset_0/M_AXIS"
        ]
      },
      "writer_0_m_axi": {
        "interface_ports": [
          "writer_0/m_axi",
          "ps_0/S_AXI_ACP"
        ]
      }
    },
    "nets": {
      "adc_0_adc_csn": {
        "ports": [
          "adc_0/adc_csn",
          "adc_csn_o"
        ]
      },
      "adc_0_m_axis_tdata": {
        "ports": [
          "adc_0/m_axis_tdata",
          "adc_slice_0/din",
          "adc_slice_1/din",
          "adc_slice_2/din",
          "adc_slice_3/din"
        ]
      },
      "adc_clk_n_i_1": {
        "ports": [
          "adc_clk_n_i",
          "pll_0/clk_in1_n"
        ]
      },
      "adc_clk_p_i_1": {
        "ports": [
          "adc_clk_p_i",
          "pll_0/clk_in1_p"
        ]
      },
      "adc_dat_a_i_1": {
        "ports": [
          "adc_dat_a_i",
          "adc_0/adc_dat_a"
        ]
      },
      "adc_dat_b_i_1": {
        "ports": [
          "adc_dat_b_i",
          "adc_0/adc_dat_b"
        ]
      },
      "adc_slice_0_dout": {
        "ports": [
          "adc_slice_0/dout",
          "mult_0/B"
        ]
      },
      "adc_slice_1_dout": {
        "ports": [
          "adc_slice_1/dout",
          "mult_1/B"
        ]
      },
      "adc_slice_2_dout": {
        "ports": [
          "adc_slice_2/dout",
          "mult_2/B"
        ]
      },
      "adc_slice_3_dout": {
        "ports": [
          "adc_slice_3/dout",
          "mult_3/B"
        ]
      },
      "concat_0_dout": {
        "ports": [
          "concat_0/dout",
          "dac_0/s_axis_tdata"
        ]
      },
      "const_0_dout": {
        "ports": [
          "const_0/dout",
          "rst_0/ext_reset_in",
          "dac_0/s_axis_tvalid",
          "cic_0/s_axis_data_tvalid",
          "cic_1/s_axis_data_tvalid",
          "cic_2/s_axis_data_tvalid",
          "cic_3/s_axis_data_tvalid"
        ]
      },
      "const_1_dout": {
        "ports": [
          "const_1/dout",
          "writer_0/cfg_data"
        ]
      },
      "dac_0_dac_clk": {
        "ports": [
          "dac_0/dac_clk",
          "dac_clk_o"
        ]
      },
      "dac_0_dac_dat": {
        "ports": [
          "dac_0/dac_dat",
          "dac_dat_o"
        ]
      },
      "dac_0_dac_rst": {
        "ports": [
          "dac_0/dac_rst",
          "dac_rst_o"
        ]
      },
      "dac_0_dac_sel": {
        "ports": [
          "dac_0/dac_sel",
          "dac_sel_o"
        ]
      },
      "dac_0_dac_wrt": {
        "ports": [
          "dac_0/dac_wrt",
          "dac_wrt_o"
        ]
      },
      "dds_0_dout": {
        "ports": [
          "dds_0/dout",
          "dds_slice_0/din",
          "dds_slice_1/din"
        ]
      },
      "dds_1_dout": {
        "ports": [
          "dds_1/dout",
          "dds_slice_2/din",
          "dds_slice_3/din"
        ]
      },
      "dds_2_dout": {
        "ports": [
          "dds_2/dout",
          "mult_4/A"
        ]
      },
      "dds_3_dout": {
        "ports": [
          "dds_3/dout",
          "mult_5/A"
        ]
      },
      "dds_slice_0_dout": {
        "ports": [
          "dds_slice_0/dout",
          "mult_0/A"
        ]
      },
      "dds_slice_1_dout": {
        "ports": [
          "dds_slice_1/dout",
          "mult_1/A"
        ]
      },
      "dds_slice_2_dout": {
        "ports": [
          "dds_slice_2/dout",
          "mult_2/A"
        ]
      },
      "dds_slice_3_dout": {
        "ports": [
          "dds_slice_3/dout",
          "mult_3/A"
        ]
      },
      "hub_0_cfg_data": {
        "ports": [
          "hub_0/cfg_data",
          "slice_0/din",
          "slice_1/din",
          "slice_2/din",
          "slice_3/din",
          "slice_4/din",
          "slice_5/din",
          "slice_6/din",
          "slice_7/din",
          "slice_8/din",
          "slice_9/din"
        ]
      },
      "mult_0_P": {
        "ports": [
          "mult_0/P",
          "cic_0/s_axis_data_tdata"
        ]
      },
      "mult_1_P": {
        "ports": [
          "mult_1/P",
          "cic_1/s_axis_data_tdata"
        ]
      },
      "mult_2_P": {
        "ports": [
          "mult_2/P",
          "cic_2/s_axis_data_tdata"
        ]
      },
      "mult_3_P": {
        "ports": [
          "mult_3/P",
          "cic_3/s_axis_data_tdata"
        ]
      },
      "mult_4_P": {
        "ports": [
          "mult_4/P",
          "concat_0/In0"
        ]
      },
      "mult_5_P": {
        "ports": [
          "mult_5/P",
          "concat_0/In1"
        ]
      },
      "pll_0_clk_out1": {
        "ports": [
          "pll_0/clk_out1",
          "ps_0/M_AXI_GP0_ACLK",
          "ps_0/S_AXI_ACP_ACLK",
          "rst_0/slowest_sync_clk",
          "adc_0/aclk",
          "dac_0/aclk",
          "hub_0/aclk",
          "dds_0/aclk",
          "dds_1/aclk",
          "dds_2/aclk",
          "dds_3/aclk",
          "mult_0/CLK",
          "rate_0/aclk",
          "cic_0/aclk",
          "mult_1/CLK",
          "rate_1/aclk",
          "cic_1/aclk",
          "mult_2/CLK",
          "rate_2/aclk",
          "cic_2/aclk",
          "mult_3/CLK",
          "rate_3/aclk",
          "cic_3/aclk",
          "comb_0/aclk",
          "fir_0/aclk",
          "subset_0/aclk",
          "writer_0/aclk",
          "mult_4/CLK",
          "mult_5/CLK"
        ]
      },
      "pll_0_clk_out2": {
        "ports": [
          "pll_0/clk_out2",
          "dac_0/ddr_clk"
        ]
      },
      "pll_0_clk_out3": {
        "ports": [
          "pll_0/clk_out3",
          "dac_0/wrt_clk"
        ]
      },
      "pll_0_locked": {
        "ports": [
          "pll_0/locked",
          "rst_0/dcm_locked",
          "dac_0/locked"
        ]
      },
      "rst_0_peripheral_aresetn": {
        "ports": [
          "rst_0/peripheral_aresetn",
          "hub_0/aresetn",
          "dds_0/aresetn",
          "dds_1/aresetn",
          "dds_2/aresetn",
          "dds_3/aresetn"
        ]
      },
      "slice_0_dout": {
        "ports": [
          "slice_0/dout",
          "rate_0/aresetn",
          "cic_0/aresetn",
          "rate_1/aresetn",
          "cic_1/aresetn",
          "rate_2/aresetn",
          "cic_2/aresetn",
          "rate_3/aresetn",
          "cic_3/aresetn",
          "comb_0/aresetn",
          "fir_0/aresetn",
          "subset_0/aresetn"
        ]
      },
      "slice_1_dout": {
        "ports": [
          "slice_1/dout",
          "writer_0/aresetn"
        ]
      },
      "slice_2_dout": {
        "ports": [
          "slice_2/dout",
          "rate_0/cfg_data",
          "rate_1/cfg_data",
          "rate_2/cfg_data",
          "rate_3/cfg_data"
        ]
      },
      "slice_3_dout": {
        "ports": [
          "slice_3/dout",
          "writer_0/min_addr"
        ]
      },
      "slice_4_dout": {
        "ports": [
          "slice_4/dout",
          "dds_0/pinc"
        ]
      },
      "slice_5_dout": {
        "ports": [
          "slice_5/dout",
          "dds_1/pinc"
        ]
      },
      "slice_6_dout": {
        "ports": [
          "slice_6/dout",
          "dds_2/pinc"
        ]
      },
      "slice_7_dout": {
        "ports": [
          "slice_7/dout",
          "dds_3/pinc"
        ]
      },
      "slice_8_dout": {
        "ports": [
          "slice_8/dout",
          "mult_4/B"
        ]
      },
      "slice_9_dout": {
        "ports": [
          "slice_9/dout",
          "mult_5/B"
        ]
      },
      "writer_0_sts_data": {
        "ports": [
          "writer_0/sts_data",
          "hub_0/sts_data"
        ]
      }
    }
  }
}